Chang Eun (Paul), Song

<Education>

• University of California, San Diego (GPA of 3.93/4.0)

2022.09 - Present

Ph.D. Candidate in Computer Science and Engineering  (Co-Advisor: Mingu Kang, Tajana Rosing)

• Korea University (GPA of 4.17/4.5, Major GPA of 4.43/4.5)

2016.03 - 2022.02

Bachelor of Engineering in Electrical Engineering  (Two years absence for military service (2018-2019))

<Publications>

Conference (* Equal Contribution)

[C.6] Clo-HDnn: Continual On-Device Learning Accelerator with Hyperdimensional Computing via Progressive Search

C. E. Song, W. Xu, K. Fan, S. Jain, G. Hota, H. Yang, L. Liu, M. F. Chang, C. H. Diaz, G. Cauwenberghs, T. Rosing, and M. Kang

IEEE Hot Chips Symposium (HCS), 2025 (To appear)

[C.5] Clo-HDnn: A 4.66 TFLOPS/W and 3.78 TOPS/W Continual On-Device Learning Accelerator with Energy-efficient Hyperdimensional Computing via Progressive Search

C. E. Song*, W. Xu*, K. Fan, S. Jain, G. Hota, H. Yang, L. Liu, K. Akarvardar, M. F. Chang, C. H. Diaz, G. Cauwenberghs, T. Rosing, and M. Kang

IEEE Symposium on VLSI Technology and Circuits (VLSI), 2025 (To appear)

[C.4] Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution

C. E Song, P. Bhatnagar, Z. Xia, N. S. Kim, T. Rosing, and M. Kang 

ACM/IEEE International Symposium on Computer Architecture (ISCA), 2025 (To appear)

[C.3] FSL-HDnn: A 5.7 TOPS/W End-to-end Few-shot Learning Classifier Accelerator with Feature Extraction and Hyperdimensional Computing,

H. Yang*, C. E. Song*, W. Xu, B. Khaleghi, U. Mallappa, M. Shah, K. Fan, M. Kang, and T. Rosing

IEEE European Solid-State Electronics Research Conference (ESSERC), 2024 [Link]

[C.2] Efficient Transformer Acceleration via Reconfiguration for Encoder and Decoder Models and Sparsity-Aware Algorithm Mapping

C. E. Song*, A. Moradifirouzabadi*, T. Rosing, and M. Kang

ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2024 [Link]

[C.1] 52.5 TOPS/W 1.7GHz Reconfigurable XGBoost Inference Accelerator based on Modular-Unit-Tree with Dynamic Data and Compute Gating

C. E. Song, Y. Li, A. Ramnani, P. Agrawal, P. Agrawal, S. Jang, S. Lee, T. Rosing, and M. Kang

IEEE Custom Integrated Circuits Conference (CICC), 2024 [Link]

 Journal (* Equal Contribution)

[J.2] FSL-HDnn: A 40nm Multi-purpose On-Device Learning Accelerator with Integrated Feature Extraction and Hyperdimensional Computing Enabling Fast Edge AI Applications (under review)

W. Xu*, C. E. Song*, H. Yang, B. Khaleghi, U. Mallappa, M. Shah, K. Fan, M. Kang, and T. Rosing

IEEE Journal of Solid-State Circuits (JSSC), 2025

[J.1] Energy-efficient Reconfigurable XGBoost Inference Accelerator with Modular Unit Trees via Selective Node Execution and Data Movement (under review)

C. E. Song, Y. Li, A. Ramnani, P. Agrawal, P. Agrawal, S. Jang, S. Lee, T. Rosing, and M. Kang

IEEE Journal of Solid-State Circuits (JSSC), 2025

<Work Experience>

• TSMC Technology, Inc, San Jose, USA

2024.06 - 2024.09 | AI Hardware Research Intern (Manager: Kerem Akarvardar)

- Circuit and architecture co-design for softmax optimization in Large Language Model

<Research Experience>

• System Energy Efficiency LAB, UC San Diego, USA 

2023.01 - Present | Graduate Student Researcher (Advisor: Prof. Tajana Rosing, http://varys.ucsd.edu/)

- AI Processor design for hyperdimensional computing, few-shot learning, and ReRAM in-memory computing

- Chip fabricated in TSMC N40 (one digital, and one mixed signal), including front-end (RTL design) and back-end (floorplanning, place & route, and gds2)

• Vertically-integrated VLSI Information Processing LAB, UC San Diego, USA 

2022.09 - Present | Graduate Student Researcher (Advisor: Prof. Mingu Kang, https://ucsdvvip.com/)

- AI Processor design for large language model, and decision tree (XGBoost)

- Digital chip fabricated in TSMC N65, including ML optimization, front-end (RTL design), and back-end (floorplanning, place & route, and gds2)

• VLSI Signal Processing LAB, Korea University, South Korea

2021.09 - 2021.12 | Undergraduate Student Researcher (Advisor: Prof. Park, Jong-Sun)

- “Enhanced Stability of 8T and 10T SRAM over 6T SRAM with monte carlo simulation”; Graduation Thesis II;

• Nano-scale Integrated Circuits for Excellence LAB, Nanyang Technological University, Singapore

2021.06 - 2021.08 | Undergraduate Student Researcher (Advisor: Prof. Kim, Tony Tae-Hyoung)

- Research on Computing-In-Memory: Analyzed Ambit In-Memory Accelerator & Advanced Computer Architecture

• Bio-Application System & IC LAB, Korea University, South Korea

2021.01 - 2021.06 | Undergraduate Student Researcher (Advisor: Prof. Lee, Hyung-Min)

- “Design of Low-Dropout (LDO) Linear Regulator ICs With Advanced Transient Response”; Graduation Thesis I;

<Teaching Experience>

• CSE 140, “Components and Design Techniques for Digital Systems”, UC San Diego, USA

2025.01 - 2025.03 | Teaching Assistant (Instructor: Tajana Šimunić Rosing)                                                                                  

<Patent>

[P.2] Changeun Song, “Three-dimensional flash memory with back gate”, US11688462B2, United States, 2023 

[P.1] Changeun Song, “Method and System for Providing Virtual Reality Space”, 10-2020-0019618, Republic of Korea, 2020

<Honors & Awards>

• Best Doctoral Research Award, Computer Science and Engineering, UCSD, Jun, 2025

• ISCA Student Travel Grant Award, Jun, 2025

• Samsung Electronics Global Talent Ph.D. Fellowship, Samsung Electronics Memory Division Solution, Oct. 2023

• Hackers Family Scholarship, 21st Hackers Bridge Scholarship, Jun. 2022

• Fund Scholarship, College of Engineering: Apple & San Francisco Alumni Association of Korea University, Feb. 2022

• Seongnam Scholarships, Seongnam City Scholarship Association Mar. 2021

• Dean’s List on 2nd Semester of 2020, Korea University, Feb. 2021

• Semester High Honors at School of Engineering, Korea University: 2021, 2020, 2017

• Top-honor Scholarships at School of Electrical Engineering, Korea University: 2021, 2020, 2017, 2016

<Chip Gallery>